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#2761
fosser2

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Several wakelocks are preventing the tablet to enter suspend... Not all of them at the same time. I suggest to disable wlan ... There is an option to keep tablet awake while wlan is active. Make sure it is not checked. Sometimes, the alarm wakelock prevents the tablet to enter suspend. That is perfectly normal, as android wakes periodically to check for emails (gmali, dropbox sync, etc). There is also the PowerManagerService sometimes preventing the tablet to enter suspend.

My suggestion is to test suspend without gapps installed, with wlan disabled.... Without the charger plugged in and without usb plugged in...


Here is a pastebin with wlan, power & gpio charger disabled at kernel level. The power and usb was also unplugged when i took the following serial dump. The build does not have gapps installed either.

http://pastebin.com/ZCXzNfDh

Edited by fosser2, 28 January 2013 - 10:29 PM.

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#2762
ejtagle

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Here is a pastebin with wlan, power & gpio charger disabled at kernel level. The power and usb was also unplugged when i took the following serial dump. The build does not have gapps installed either.

http://pastebin.com/ZCXzNfDh


Sometimes, the answer is so obvious, we fail to see it...

<6>wakeup wake lock: event1-353

This wakelock is created in /drivers/input/evdev.c, line 322...

What input device do you have as /dev/input/event1 ? ... That is the culprit... It is creating continuous events that prevent the tablet to go to sleep... That device fails to stop sending events while the system is suspended... Perhaps accelerometer ?

I had similar issues with the p10an01 accelerometer... You need to port that driver to the latest suspend infraestructure. You can see what i did to make it work on the bma150.c accelerometer driver ...

Edited by ejtagle, 29 January 2013 - 04:13 AM.

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#2763
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Sometimes, the answer is so obvious, we fail to see it...

<6>wakeup wake lock: event1-353

This wakelock is created in /drivers/input/evdev.c, line 322...

What input device do you have as /dev/input/event1 ? ... That is the culprit... It is creating continuous events that prevent the tablet to go to sleep... That device fails to stop sending events while the system is suspended... Perhaps accelerometer ?

I had similar issues with the p10an01 accelerometer... You need to port that driver to the latest suspend infraestructure. You can see what i did to make it work on the bma150.c accelerometer driver ...


ejtagle,
I actually looked into this a bit yesterday. I ran cat /sys/class/input/event1/device/name and pulled event1 which happened to be the capacitive keys on our tablet. Then I disabled them and took another serial dump. Event1 then became our touchscreen and the error persisted. I actually DID try disabling the touchscreen also and the error was still there. So I am at a loss why event1-353 would be causing this...

Latest Pastebin:
http://pastebin.com/aTGk1F4T
(wifi, capacitive buttons, gpio-charger, battery all disabled usb unplugged)

In the log above i also notice there is a event3 at the end. This relates to "gpio-keys" and is most likely because I pushed the power button to get the device out of the sleep cycle.

Edited by fosser2, 29 January 2013 - 05:17 PM.

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#2764
ejtagle

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ejtagle,
I actually looked into this a bit yesterday. I ran cat /sys/class/input/event1/device/name and pulled event1 which happened to be the capacitive keys on our tablet. Then I disabled them and took another serial dump. Event1 then became our touchscreen and the error persisted. I actually DID try disabling the touchscreen also and the error was still there. So I am at a loss why event1-353 would be causing this...

Latest Pastebin:
http://pastebin.com/aTGk1F4T
(wifi, capacitive buttons, gpio-charger, battery all disabled usb unplugged)

In the log above i also notice there is a event3 at the end. This relates to "gpio-keys" and is most likely because I pushed the power button to get the device out of the sleep cycle.


Let's try to add to the kernel command line no_console_suspend=1, and also add the timestamps to the kernel logs... Something is waking up instantly the system as soon as it tries to go to LP1... If you have disabled accelerometer, and this problem continues...

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#2765
fosser2

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Let's try to add to the kernel command line no_console_suspend=1, and also add the timestamps to the kernel logs... Something is waking up instantly the system as soon as it tries to go to LP1... If you have disabled accelerometer, and this problem continues...


Ok, I added no_console_suspend=1 to the command line. I also checked and as for the timestamps they should be on... This was enabled.
PRINTK_TIME [=y]

Here is the latest dump with the new command line option.
http://pastebin.com/b3tarEcS

EDIT: in this pastebin event0 is "tegra-alc5623 Headphone Jack"

This is what our Command Line looks like from the dump:
<5>Kernel command line: zcache no_console_suspend=1 mem=448M@0M nvmem=64M@448M vmalloc=192M video=tegrafb console=ttyS0,115200n8 usbcore.old_scheme_first=1 cpuid=200102 devicetype=1002 bspversion=0202100907 btmac=9c5ed6131a00 tegraboot=nand mtdparts=tegra_nand:16384K@12032K(misc),16384K@62208K(recovery),16384K@79104K(boot),358400K@96000K(system),68480K@455296K(cache),4096K@7424K(bootbmp),32768K@28928K(logodata)

Edited by fosser2, 29 January 2013 - 08:49 PM.

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#2766
ejtagle

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Ok, I added no_console_suspend=1 to the command line. I also checked and as for the timestamps they should be on... This was enabled.

PRINTK_TIME [=y]

Here is the latest dump with the new command line option.
http://pastebin.com/b3tarEcS

EDIT: in this pastebin event0 is "tegra-alc5623 Headphone Jack"

This is what our Command Line looks like from the dump:
<5>Kernel command line: zcache no_console_suspend=1 mem=448M@0M nvmem=64M@448M vmalloc=192M video=tegrafb console=ttyS0,115200n8 usbcore.old_scheme_first=1 cpuid=200102 devicetype=1002 bspversion=0202100907 btmac=9c5ed6131a00 tegraboot=nand mtdparts=tegra_nand:16384K@12032K(misc),16384K@62208K(recovery),16384K@79104K(boot),358400K@96000K(system),68480K@455296K(cache),4096K@7424K(bootbmp),32768K@28928K(logodata)


I have followed all the suspend procedures in kernel... By looking at the logs, seems the processor is actually going to LP1... And then it is woken up ... probably by an external source... Seems not to be a wakelock... otherwise, the process would not go so far...

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#2767
fosser2

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I have followed all the suspend procedures in kernel... By looking at the logs, seems the processor is actually going to LP1... And then it is woken up ... probably by an external source... Seems not to be a wakelock... otherwise, the process would not go so far...


So do you think its actually something rom based that is waking it up? Personally I think it is...

Here is a logcat from during the sleep loop
http://pastebin.com/PG7ZZ51s

Edited by fosser2, 30 January 2013 - 08:19 PM.

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#2768
ejtagle

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No, if you mean Android rom based, i don't think so... There is something hw related that is actually waking the system from LP1...
When the message <6>Entering suspend state LP1 is shown, there is no turning back: The system actually goes to LP1, and then, the only way to wake it up is by hw means. Android usually programs the hw alarm clock to wake up the system if required at a given point in time. Of course it can be waken by other sources if enabled> (UART activity, keyboard presses, interrupt sources).

(taken from nvidia conversations regarding LP modes on tegra2 a long time ago)

Tegra supports three low power modes that involve powering down the CPU.

LP2 powers down both CPU cores and the GICs, but leaves the core
peripherals, including the memory controller and the legacy
interrupt controller, enabled. The legacy interrupt controller
is used as the wakeup source, and any interrupt can wake the device.
LP2 can be used in idle.

LP1 is the same as LP2, but in addition turns off the memory
controller and puts the DDR memory in self-refresh. Any interrupt
can wake the device. LP1 could be used in idle if no peripherals
are doing DMA.

LP0 turns off everything in the SoC except the RTC and a power
management controller, both of which run off a 32 kHz clock.
The power management controller has 32 wake sources, all other
interrupts can not be used to wake from LP0.

LP2 idle mode power-gates the main CPU complex, requiring a
full processor state save and restore from a reset vector.

Processor context area is allocated during platform initialization
from the kernel, and mapped into the hotplug page tables (which also
serve as the initial page tables for the LP2 main processor reset).

Platform-specific data (power good times, PMU capabilities, etc.) must be
specified when registering the suspend operations to ensure that platform
power sequencing restrictions are maintained.

Since all device interrupts (except timers) are disabled in the suspend
path, the wakeup interrupts need to be manually unmasked before entering
into a suspend state or the processor will never wake up; these forced-unmask
interrupts are re-masked immediately in the resume path to prevent the
kernel from live-locking prior to driver resume.

In both LP0 and LP1, SDRAM is placed into self-refresh. in order to safely
perform this transition, the final shutdown procedure responsible for

* turning off the MMU and L1 data cache
* putting memory into self-refresh
* setting the DDR pads to the lowest power state
* and turning off PLLs

is copied into IRAM (at the address TEGRA_IRAM_BASE + SZ_4K) at the
start of the suspend process.

In LP1 mode (like LP2), the CPU is reset and executes the code specified
at the EVP reset vector. Since SDRAM is in self-refresh, this code must
also be located in IRAM, and it must re-enable DRAM before restoring the
full context. In this implementation, it enables the CPU on PLLP, enables
PLLC and PLLM, restores the SCLK burst policy, and jumps to the LP2 reset
vector to restore the rest of the system (MMU, PLLX, coresite, etc.). The
LP2 reset vector is expected to be found in PMC_SCRATCH1, and is
initialized during system-bootup.

In LP0 mode, the core voltage domain is also shutoff. As a result, all
of the volatile state in the core voltage domain (e.g., pinmux registers,
clock registers, etc.) must be saved to memory so that it can be restored
after the system resumes. A limited set of wakeups are available from LP0,
and the correct levels for the wakeups must be programmed into the PMC
wakepad configuration register prior to system shutdown. On resume, the
system resets into the boot ROM, and the boot ROM restores SDRAM and other
system state using values saved during kernel initialization in the PMC
scratch registers.

Resuming from LP0 requires the boot ROM to supply a signed recovery codeblob
to the kernel; the kernel expects that the length and address of this blob
is supplied with the lp0_vec= command line argument; if not present, suspend-
to-LP0 will be disabled

For simplicity, the outer cache is shutdown for both LP0 and LP1; it
is possible to optimize the LP1 routine to bypass outer cache shutdown
and restart.

To save power, SMP tegra SoCs place non-boot CPUs in reset when they
are removed from the scheduling cluster using CPU hotplug.

Slave CPUs save their contexts (incl. CP15 and VFP state) out to a
reserved memory region, cancel SMP operation, and write to the SoC
reset controller to disable themselves. This is done with caches and
MMU enabled, so care is taken to ensure that all the dirty context cache
lines are cleaned out to the PoC before shutting down.

When re-enabled, slave CPUs execute a hotplug boot routine which mirrors
the initial configuration performed by secondary_startup, but after
enabling the MMU "return" to __cortex_a9_restore which restores the
saved state from the context area, and returns to platform_cpu_die.


So, any interrupt source not properly masked at suspend time could be the culprit here... I have a question here... Is the 3.1 kernel the first one you did for this device? ,,, Because, if it is not, and the previous ones suspended to LP1 as they should, maybe we could compare them... :D (kernel 2.6.32 does not count! ;) )

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#2769
fosser2

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So, any interrupt source not properly masked at suspend time could be the culprit here... I have a question here... Is the 3.1 kernel the first one you did for this device? ,,, Because, if it is not, and the previous ones suspended to LP1 as they should, maybe we could compare them... :D (kernel 2.6.32 does not count! ;) )


The last 2 kernels we have run were .39 and 3.1. We have had lp1 working since the ICS days, our latest 3.1 kernel and android 4.1.2 were working with sleep just fine. As soon as we upgraded to 4.2.1 we had the sleep issues. Someone also took the older .39 kernel and tried it on 4.2.1. It also had the sleep issue! If we flash a 4.1.2 rom to the tablet, the tablet sleeps fine... My mind is blown here.

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#2770
ejtagle

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If the same kernel with the 4.1.2 works fine, and with the 4.2.x aosp does not sleep, the problem then lies in the Framework... Maybe is the framework holding a wakelock, after all ? ... Maybe the values in config.xml ?

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#2771
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If the same kernel with the 4.1.2 works fine, and with the 4.2.x aosp does not sleep, the problem then lies in the Framework... Maybe is the framework holding a wakelock, after all ? ... Maybe the values in config.xml ?


Here is our config.xml. Nothing really sticks out to me that we did wrong in here that would be causing a wake...
https://github.com/r...lues/config.xml

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#2772
ejtagle

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Before I forget, posting here the latest Overclocking kernel patches for the Advent Vega. This version (at least, for me) stabilizes the system and completely avoids system freezes.

Attached Files


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#2773
ejtagle

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Here is our config.xml. Nothing really sticks out to me that we did wrong in here that would be causing a wake...
https://github.com/r...lues/config.xml


Maybe installing a 4.1.x rom, getting the dmesg and logcats when it enters sleep with all the debug options we have already enabled, then doing the same with the 4.2.x rom and them comparing both dmesgs and logcats could give us a clue on the differences that are making the 4.2.x keep awake instead of going to lp1 sleep...

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#2774
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Maybe installing a 4.1.x rom, getting the dmesg and logcats when it enters sleep with all the debug options we have already enabled, then doing the same with the 4.2.x rom and them comparing both dmesgs and logcats could give us a clue on the differences that are making the 4.2.x keep awake instead of going to lp1 sleep...


With those debugging options enabled here are the 2 serial dumps.

4.1.2: http://pastebin.com/hBAf850J
4.2.1: http://pastebin.com/yzkW0NiQ

In 4.2.1 I see
<6>gpio bank wake found: wake24 for irq=119
<6>Enabling wake24

This little bit seems to be the biggest difference I noticed...

EDIT: I did use the EXACT same kernel on both roms. There were no tweaks to it at all.

Edited by fosser2, 01 February 2013 - 08:03 PM.

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#2775
ejtagle

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Posting for scanno: Latest power hal thatpreserves the maximum speed set by the CPU master app (or any other that setsthe maximum possible frequency for CPU)

Attached Files


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#2776
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With those debugging options enabled here are the 2 serial dumps.

4.1.2: http://pastebin.com/hBAf850J
4.2.1: http://pastebin.com/yzkW0NiQ

In 4.2.1 I see

<6>gpio bank wake found: wake24 for irq=119
<6>Enabling wake24

This little bit seems to be the biggest difference I noticed...

EDIT: I did use the EXACT same kernel on both roms. There were no tweaks to it at all.


Wake24 is the TEGRA_GPIO_PV2 input. It is usually the power button. Somehow, 4.1.2 does not completely enable wake for it, but 4.2.x does... Check your *,kl (keylayout) files in your lunch target for your device... Also check your *.kcm files...maybe there is something there...

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#2777
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Wake24 is the TEGRA_GPIO_PV2 input. It is usually the power button. Somehow, 4.1.2 does not completely enable wake for it, but 4.2.x does... Check your *,kl (keylayout) files in your lunch target for your device... Also check your *.kcm files...maybe there is something there...


I just went through and diffed all .kl and .kcm files from 4.1.2 --> 4.2.1 and they were all identical. So it seems nothing on that end has changed.

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#2778
ejtagle

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Maybe what has changed is the way the framework uses those files... Try to remove the WAKE keyword from the power button...

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#2779
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Maybe what has changed is the way the framework uses those files... Try to remove the WAKE keyword from the power button...


In the kernel I disabled our custom power button code and reverted our tps6586x.c back to stock configuration. Looping still occurred.
This output still bothers me.
<6>gpio bank wake found: wake24 for irq=119
<6>Enabling wake24

I'm wondering how I could figure out what irq 119 is. Any ideas on that?

Edited by fosser2, 04 February 2013 - 07:27 AM.

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#2780
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Duplicate post, remove

Edited by fosser2, 04 February 2013 - 07:26 AM.

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