Hi I was looking into your github and I found a little mistake into acpuclock-7x30.c at line 53 there is
+#define PLL2_L_VAL_ADDR (MSM_CLK_CTL_BASE + 0x33)
but right is
+#define PLL2_L_VAL_ADDR (MSM_CLK_CTL_BASE +
0x33c)
as written here
https://github.com/c...cpuclock-7x30.c
please look at static struct clkctl_acpu_speed acpu_freq_tbl and give me your opinion about that..
{ 184320, PLL_3, 5, 4, 61440, 25, VDD_RAW(25) },
must be
{ 184320, PLL_3, 5,
3, 61440, 25, VDD_RAW(25) },
{ 368640, PLL_3, 5, 1, 122800, 25, VDD_RAW(25) },
must be
{ 368640, PLL_3, 5, 1, 1228
80, 25, VDD_RAW(25) },
anyway congratulations for your work
And thank for 1% battery step..
Edited by davidevinavil, 29 May 2011 - 10:33 PM.