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[KERNEL] [BUG REPORT] ACPUCLOCK-7627 frequency table selection


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Affected kernel driver: acpuclock-7627.c

 

Affected driver routine: static void __devinit select_freq_plan(void)

 

Bugous code:

    if (cpu_is_msm8625() &&    pll_mhz[ACPU_PLL_4] == 1008) {
        if (pll_mhz[ACPU_PLL_2] == 245) {  <<----------------------------- [*BUG*]
            acpu_freq_tbl =
                pll0_960_pll1_245_pll2_1200_pll4_1008_2p0;
        } else {
            acpu_freq_tbl =
                pll0_960_pll1_196_pll2_1200_pll4_1008_2p0;
        }
        t->tbl = acpu_freq_tbl;
    } else {
        /* Select the right table to use. */
        for (; t->tbl != 0; t++) {
            if (t->pll0_rate == pll_mhz[ACPU_PLL_0]
                && t->pll1_rate == pll_mhz[ACPU_PLL_1]
                && t->pll2_rate == pll_mhz[ACPU_PLL_2]
                && t->pll4_rate == pll_mhz[ACPU_PLL_4]) {
                acpu_freq_tbl = t->tbl;
                break;
            }
        }
    }
Edited by Guest
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Thx to ZolaIII, I noticed there's a bug on the current acpuclock driver for MSM7627 based boards, provided by Qualcomm/CodeAurora.
 
I've add some debug code to get the PLL values read from our hardware by the driver:

PLL0 -> 960
PLL1 -> 245
PLL2 -> 1200
PLL4 -> 1008

This means, that

        if (pll_mhz[ACPU_PLL_2] == 245) {

is always false!

 

FIXED it should look like this:

        if (pll_mhz[ACPU_PLL_1] == 245) {
Edited by Guest
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Due of this bug the driver selects the wrong frequency table for our CPU (MSM8225).
 
Wrong table:

Id CPU-KHz PLL DIV AHB-KHz ADIV AXI-KHz D0 D1 D2 D4 U0 U1 U2 U4
0   19200   5   1    2400    4   24576 -1 -1 -1 -1  5  3 -1 -1
1   65536   1   4    8192    4   49152 -1 -1 -1 -1  5  3 -1 -1
2   98304   1   2   12288    4   49152 -1  1 -1 -1  5  3  6 -1
3  196608   1   1   24576    4   98304 -1  1 -1 -1  5 -1  6 -1
4  320000   0   3   40000    4  122880 -1  1 -1 -1  5 -1  6  7
5  480000   0   2   60000    4  122880  4  1 -1 -1 -1 -1  6  7
6  600000   2   2   75000    4  160000  4  2 -1 -1 -1 -1 -1  8
7  700800   4   1   87500    4  160000  4 -1  6 -1 -1 -1 -1  8
8 1008000   4   1  126000    4  200000 -1 -1  6  7 -1 -1 -1 -1

 
Correct table:

Id CPU-KHz PLL DIV AHB-KHz ADIV AXI-KHz D0 D1 D2 D4 U0 U1 U2 U4
 0   19200   5   1    2400    4   30720 -1 -1 -1 -1  6  3  4 -1
 1   61440   1   4    7680    4   61440 -1 -1 -1 -1  6  3  4 -1
 2  122880   1   2   15360    4   61440 -1  1 -1 -1  6  3  7 -1
 3  245760   1   1   30720    4   61440 -1  1 -1 -1  6 -1  7  8
 4  300000   2   4   37500    4  122880 -1  1 -1 -1  6 -1  7  8
 5  320000   0   3   40000    4  122880 -1  1  4 -1  6 -1  7  8
 6  480000   0   2   60000    4  122880  5  1  4 -1 -1 -1  7  8
 7  600000   2   2   75000    4  160000  5  2  4 -1 -1 -1 -1  9
 8  700800   4   1   87500    4  160000  5  3  4 -1 -1 -1 -1  9
 9 1008000   4   1  126000    4  200000 -1 -1  7  8 -1 -1 -1 -1

NOTE: Although many frequencies are present in both tables, the values for D0-D4 & U0-U4 differ!
 
fonz93 found something regarding those D-values: http://msdn.microsoft.com/en-us/library/aa932261.aspx

Edited by Guest
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Guest fonz93

This because Huawei uses the same f****ing source code for 32108428234742 devices... the code you mentioned should be used on G510 that has the frequency "245760" available, but we haven't, as you are saying, it needs to be added, Right?

 

You need to check in G510 Kernel source if there is the same code ( i am 90% sure that there is)

 

Remember that we are using 8225 (1 ghz)(Y300) and not 8625 (1.2 ghz)(G510)

Edited by fonz93
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This time it's not Huawei's fault. The bug got detected before already by [email protected]

 

Our device (MSM8225 CPU) isn't supposed to use 65, 98, 196 Mhz, BUT --> 61, 122, 245 Mhz instead.

 

The G510 is not affected by it. Only our Y300 (and other 1GHz MSM7627a based SoCs with an MSM8225 CPU)

Edited by Guest
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Guest fonz93

Our device (MSM8225 CPU) isn't supposed to use 65, 98, 196 Mhz, BUT --> 61, 122, 245 Mhz instead.

 

I thought was the opposite, as the G510 uses 122,245 

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